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Valid for year : 2007
 
TSEK01 VLSI Design, 9 ECTS credits.
/VLSI-konstruktion, CDIO/

For:   D   IT   SOC   Y  

 

Prel. scheduled hours: 28
Rec. self-study hours: 212

  Area of Education: Technology

Subject area: Electrical Engineering
  Advancement level (G1, G2, A): A

Aim:
This course is intended to give knowledge and experience in design and fabrication of CMOS VLSI chips. This includes:
  1. Deep insight in physical design of VLSI chips.
  2. Knowledge and experience of using professional CAD tools for design, simulation, layout, and verification of VLSI chips.
  3. Design of a â?~realâ?T and functional chip, starting from the idea and behavioral modeling to detailed circuit design at transistor level, circuit layout, and final verifications.
  4. Complete the project using a systematic and professional approach required by industry to run large and complex VLSI projects:
    • Organize a project group, make project plan, and divide the task efficiently among the group members.
    • Promote teamwork, create a dynamic and functional group, and actively monitor the progress of the project.
    • Apply the knowledge from previous courses, search for supplementary knowledge and material, take the initiative, and find creative solutions.
    • Meet the project milestones and the final deadline, document the project, and show the progress by written reports and oral presentations.


Prerequisites: (valid for students admitted to programmes within which the course is offered)
Good knowledge in fundamentals of electronics, digital technique, MOS transistors and CMOS technology, digital and analog integrated circuits. The following courses cover most of the above knowledge: Introduction to VLSI Design (TSTE86), advanced VLSI Design (TSEK36), and Analog and Discrete-Time Integrated Circuits (TSTE80)

Note: Admission requirements for non-programme students usually also include admission requirements for the programme and threshhold requirements for progression within the programme, or corresponding.
Supplementary courses:
TSEK10 Evalution of an Integrated circuit.
Organisation:
Lectures (8X2h), Labs (6X4h), and the chip design project, where the task is: Design, simulation, and fabrication-ready layout of VLSI functional blocks on a chip in 0.35µm CMOS Technology. The core of the course is the project, which will be selected and carried out by a group of 4-to-8 students in an independent manner. The complete chip-design should be ready by the end of period 4, and a written report should be handed to a supervisor (one for a design team). The chips can be fabricated provided the design is accepted and the students declare to attend the course TSEK10, Evaluation of an Integrated Circuit (period 1 in the following academic year).

Course contents:
Labs include: a small project-example intending to demonstrate a full custom (handwork) and an automated VLSI design flow as well as introducing major CAD tools to be used throughout the design projects.
Design project includes: Team building, project planning, project management, pre-study of the project, architectural exploration, behavioral modeling and verifications, logic and transistor-level design and circuit simulations, circuit layout, layout verifications, tape out, and the final project documentation.
Lectures support the project moments including: Course description, introduction to VLSI design methodology, project description, advanced circuit and layout techniques, interconnect interface circuits, on-chip power delivery, clock distribution, synchronization techniques, IO drivers, and pads, testability and reliability considerations, and other related topics.
Course literature:
Jan M. Rabaey, Anantha Chandrakasan, Borivoje Nikolic, "Digital Integrated Circuits", Prentice Hall, Second Edition (International edition), ISBN 0-13-120764-4
Examination:
Project work
Laboratory work
 5 p
1 p
/
/
7,5 ECTS
1,5 ECTS
 
Grades are given as â?~Failâ?T or â?~Passâ?T.


Course language is English.
Department offering the course: ISY.
Director of Studies: Tomas Svensson
Examiner: Atila Alvanpour
Link to the course homepage at the department


Course Syllabus in Swedish

Linköping Institute of Technology
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Contact: TFK , val@tfk.liu.se
Last updated: 12/11/2007