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| TSTE70 | Design of Digital Systems , 5 p (sw) /Konstruktion av digitala systen/ Advancement level: C | |
| Aim: The course includes methods and tools for design and implementation of complex electronic systems. The emphasis is put on the design process. The specification of large complex systems must be executable to avoid interpretation errors and to enable performance estimations. The description must then be partitioned into smaller and more detailed descriptions down to a level that allows a mapping to hardware. VHDL is a language used to describe the digital system. Models using increasing levels of details can be built and mixed as well as testbenches used to validate every new model. VHDL is also well suited for logic synthesis from a description at the RTL level. It is however important that the designer is well aware of the principles these tools follows and what results to expect. Hands on experience of the synthesis tools are therefore important to appreciate the problems that may arise. Programmable circuits such as FPGA is increasingly used to replace ASICs as well as for verification of a design in advance of an ASIC manufacturing. Prerequisites: Basic courses in digital circuitsCourse organization: Besides lectures, the course includes a laboration series and a small project.Course content: Design of complex digital systems. Problem definition, specification, design process. Complexity, partitioning, and validation. Hardware description languages, introduction to VHDL. Behavioral descriptions, modeling techniques, time delays. Test benches and verification methods. Hard real-time systems. Computational properties of algorithms, methods for scheduling, resource allocation and assignment. Synthesis of optimal architectures. Tools for design and simulation. Description of the design process for logic synthesis, optimization for VLSI implementation. Fast prototyping using FPGA. Course literature: Armstrong J., Gray F. G.: "VHDL design representation and synthesis", Prentice-Hall 2000 | ||
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