studiehandbok@lith | ||
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TDTS52 | Computer Architecture, 2 p (sw) /Datorarkitektur I/ Advancement level: B | |
Aim: This course will give students knowledge of how a computer works and an overview of computer organization. It will, in particular, deal with hardware, architecture, and parallel computer systems. Prerequisites: TSEA 04 Switching Theory and Logical Design TDDB 31 Orientation in IT Infrastructures (or equivalent courses)Course organization: The course consists of a series of lectures and a case study. In the case study, analysis of one of the commercial computer architectural models that have been developed recently will be carried out by the students. Course content: CPU, memory hierarchy, cache memory, virtual memory, input/output handling and interconnect structure, instruction set, micro-programming, instruction pipelining, Reduced Instruction Set (RISC) processors, superscalar and parallel computer systems.Course literature: Stallings, William: "Computer Organization and Architecture, 5th edition", Prentice Hall International, 2000. |
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