| TSEK36 |
Advanced VLSI Design, 6 ECTS credits.
/Avancerad VLSI-konstruktion/
For:
D
IT
SOC
Y
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Prel. scheduled
hours: 50
Rec. self-study hours: 110
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Area of Education: Science
Subject area: Electrical Engineering
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Advancement level
(G1, G2, A): A
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Aim:
This course is intended to give a detailed knowledge and experience in design of advanced VLSI circuits and chips in today's and future nano-scale CMOS technologies. This includes:
1- Possibilities and limitations of advanced CMOS technologies. Small and large signal modeling of transistors for analog and digital circuits.
2- Design, analysis, and evaluation techniques for high performance VLSI circuits with robust operation in presence of noise, distortions, process variations, and temperature.
3- Design and analysis of several versatile analog, digital, and mixed analog-digital circuit building blocks frequently utilized in VLSI chips, including single-ended and differential amplifiers, sampling switches, etc.
4- Experience of using latest professional circuit simulators for design of VLSI circuits.
5- On-chip interconnects design, and basic knowledge about on-chip communication, timing, synchronization methods, and related circuit techniques.
6- Understanding for power consumption, power delivery, and power management in advanced VLSI chips
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Prerequisites: (valid for students admitted to programmes within which the course is offered)
TSTE86 Digital Integrated Circuits
Note: Admission requirements for non-programme students usually also include admission requirements for the programme and threshhold requirements for progression within the programme, or corresponding.
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Supplementary courses:
VLSI Design Project, TSEK01, where students follow the entire VLSI design flow and make 'Real' chips in a standard CMOS process. For more information please check the course website: http://www.ek.isy.liu.se/2003/courses/tsek01/
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Organisation:
This course comprises 13 lectures, 6 tutorials, and 12 hours laboratory exercises. The 6 tutorials support the course by detailed analysis of some problem examples, and the 12 hours laboratory exercises allows students to learn circuit design, simulations, and evaluation techniques utilizing professional CAD tools and standard CMOS process technology models and parameters.
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Course contents:
The course will focus on the following topics:
- Overview of advanced CMOS process technologies.
- Modeling of MOS transistors and passive elements for analog and digital circuits.
- Circuit analysis as well as design and simulation strategies required to evaluate analog and digital CMOS integrated circuits. As a representative benchmark, different amplifier stages, sampling switches, current sources, and other basic circuit building blocks will be studied. The circuit analyses will take into account non-ideal effects such as noise and potential variations in process parameters, terminals voltages, and operating temperature.
- On-chip interconnects design and I/O interface circuits. This includes studies on interconnects delay models for high-speed data transmission as well as power and performance analysis of on-chip buses including driver/receiver circuits.
- On-chip timing and synchronization techniques, including detailed studies on clock generators, clock distribution networks, and clocking elements such as latches and flip-flops. Also, major clock- and data-recovery circuits such as phase- and delay-locked-loops will be discussed.
- Analysis of on-chip power consumption, power delivery, and power management.
- Overview of chip manufacturing requirements such as product yield and product reliability, as well as chip testing methodologies.
BACKGROUND AND MOTIVATION
Today's and future advanced VLSI chips can comfortably include over one billion of transistors in a single piece of silicon with an area of a few square millimeters! Obviously, these transistors are not just there randomly, but each device is carefully designed and positioned to do its job, and to interact with other devices and circuits which might be in the neighborhood or sometimes in the far end of the chip!
Despite 6-7 electrically isolated metal layers available on-chip, it's not so hard to imagine what a nightmare is to lay out these billion of devices and to route all the interconnections between them!
This might sound cool and challenging enough, but we haven't even scratched the surface yet! It's just the beginning of the story! Even if you have completed the entire layout correctly, still, who knows that the chip will really work? What about all those tough power and performance specifications which must be met in the presence of serious and increasingly large process variations? How do you know that the real chip will operate as you expect. Did you model everything correctly across all process corners? Did you simulate everything correctly? Did you take into account all noise sources? Did you use a correct circuit topology with sufficient robustness against potential noise and signal timing uncertainties? Did you follow all the manufacturing requirements for product reliability and life time? Is that really a high-yield design, where at least over 90% of the chips will work and can be shipped out to customer? â?¦.. OR you are just about to fail A Multi-Million Dollar project?
- More information for students who are planning their future courses
'VLSI' refers to Very Large Scale Integrated circuits (chips that can today include over billions of transistors in a single and small piece of silicon). For example microprocessors in PC's and other computers are VLSI chips. The department of electrical engineering (ISY) provides a world class VLSI education package including 4 courses starting with (i) the introductory course, Digital Integrated Circuits, TSTE86, (ii) the Advanced VLSI course, TSEK35 (this course), and (iii) the 'ultimate' and perhaps the most expensive course in LiTH, 'VLSI Design Project course', TSEK01, where students follow the entire VLSI design flow and make 'Real' chips in a standard CMOS process. The chips can then be measured in a short course, 'Evaluation of an Integrated Circuit', TSEK10.
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Course literature:
1- Behzad Razavi, "Design of Analog CMOS Integrated Circuits", 1st Edition
McGraw-Hill Higher Education, ISBN 0-07-238032-2
2- Jan M. Rabaey, Anantha Chandrakasan, Borivoje Nikolic, "Digital Integrated Circuits", Prentice Hall, Second Edition (International edition), ISBN 0-13-120764-4 (The same book used in the introductory course, TSTE86, Digital Integrated Circuits).
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Examination: |
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Written exam
Laboratory work
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3 p
1 p
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4,5 ECTS
1,5 ECTS
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Course language is English.
Department offering the course: ISY.
Director of Studies: Tomas Svensson
Examiner: Atila Alvandpour
Course Syllabus in Swedish
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