| TSEK01 | VLSI Design, 9 ECTS credits. /VLSI-konstruktion, CDIO/ |
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Prel. scheduled
hours: 28 |
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Area of Education: Technology Subject area: Electrical Engineering |
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| Advancement level
(A-D): D
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| Aim: A comprehensive introduction to design and fabrication of Very Large Scale Integrated (VLSI) circuits in sub-micron CMOS technology. Students passing this course will have acquired considerable insight into VLSI design methodology, high-performance and low-power circuit techniques, circuit layout, and chip design. The course supports the CDIO project highlights and the LIPS project model to promote teamwork and communication skill required by industry to run large and complex VLSI projects. |
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| Prerequisites: (valid for students admitted to programmes within which the course is offered) Recommended background: Good knowledge in fundamentals of electronics, digital technique, MOS transistors and CMOS technology, digital and analog integrated circuits. The following courses cover most of the above knowledge: Introduction to VLSI Design (TSTE86), advanced VLSI Design (TSEK35), and Analog and Discrete-Time Integrated Circuits (TSTE80) Note: Admission requirements for non-programme students usually also include admission requirements for the programme and threshhold requirements for progression within the programme, or corresponding. |
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| Supplementary courses: TSEK10 Evalution of an Integrated circuit. |
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| Organisation: Lectures (8X2h), Labs (5X4h), and the chip design project, where the task is: Design, simulation, and fabrication-ready layout of VLSI functional blocks on a chip in 0.35Āµm CMOS Technology. The core of the course is the project, which will be selected and carried out by a group of 4-to-8 students in an independent manner. The complete chip-design should be ready by the end of period 4, and a written report should be handed to a supervisor (one for a design team). The chips can be fabricated provided the design is accepted and the students declare to attend the course TSEK10, Evaluation of an Integrated Circuit (period 1 in the following academic year). |
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| Course contents: Labs include: a small project-example intending to demonstrate a full custom (handwork) and an automated VLSI design flow as well as introducing major CAD tools to be used throughout the design projects. Design project includes: Team building, project planning, project management, pre-study of the project, architectural exploration, behavioral modeling and verifications, logic and transistor-level design and circuit simulations, circuit layout, layout verifications, tape out, and the final project documentation. Lectures support the project moments including: Course description, introduction to VLSI design methodology, project description, advanced circuit and layout techniques, interconnect interface circuits, on-chip power delivery, clock distribution, synchronization techniques, IO drivers, and pads, testability and reliability considerations, and other related topics. |
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| Course literature: Jan M. Rabaey, Anantha Chandrakasan, Borivoje Nikolic, "Digital Integrated Circuits", Prentice Hall, Second Edition (International edition), ISBN 0-13-120764-4 |
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| Examination: | |||
| Project work Laboratory work |
5 p 1 p |
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| Grades are given as ā?~Failā?T or ā?~Passā?T. | |||
Course language is English. Department offering the course: ISY. Director of Studies: Tomas Svensson Examiner: Atila Alvanpour Link to the course homepage at the department Course Syllabus in Swedish |
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